반도체 장치 및 그 제조 방법

A semiconductor device and a fabrication method thereof

Abstract

PURPOSE: A semiconductor device is provided to prevent a bridge between pads buried in a pad contact by differently forming the pad contact while using a gate and a gate spacer formed in a semiconductor substrate as a self alignment mask. CONSTITUTION: An inactive region(150) defines an active region in the semiconductor substrate(100). A gate(280) is formed in the active and inactive regions. A predetermined region of the semiconductor substrate is formed on both sides of the gate, opened by the formation of the gate. The first insulation layer(310) is formed on the predetermined region, the gate and the gate spacer(290). Two of the first pad contacts(330) are formed in the first insulation layer, the gas and the gate spacer. The first pad(350) is buried in the first pad contact. The second and third insulation layers are sequentially formed on the first insulation layer and the first pad. The second pad contact is formed in the first through third insulation layers, the gate and the gate spacer. A varied second pad contact(410-1) is formed in which the diameter of the second pad contact made of the third insulation layer is greater than that of the second pad contact made of the first and second insulation layers formed on the gate. The second pad is buried in the varied second pad contact.
본 발명은 반도체 장치및 그 제조 방법에 관한 것으로서, 상세하게는 반도체 기판에 형성된 게이트(GATE)와 게이트 스페이서(GATE SPACER)를 자기 정렬 마스크(SELF ALIGNMENT MASK)로 해서 패드 콘택(PAD CONTACT)의 형성 단계를 달리하여 패드 콘택에 매립되어 디자인 룰(DESIGN RULE) 축소에 대응할 수 있는 패드를 구비한 반도체 장치및 그 제조 방법이다. 상기 반도체 장치는 패드 콘택에 매립된 패드사이의 절연을 층간 절연막으로 분리하여 디자인 룰 축소로 생길 수 있는 패드 브리지(BRIDGE)를 방지해서 수율 향상(YIELD-UP)을 추구하는데 있다.

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